/* this file is automatic generate . Please do not edit it
       ./genpintab.awk gpio_pinmux.csv > <this file name> can generate this file*/
#define AOBUS_REG_ADDR_MASK(a)   AOBUS_REG_ADDR(((a)&0xffff))
#define REG (0x202c)
#define AO_REG (0x14)
#define P_GPIO_OEN_0 CBUS_REG_ADDR(0x200c)
#define P_GPIO_OEN_1 CBUS_REG_ADDR(0x200f)
#define P_GPIO_OEN_2 CBUS_REG_ADDR(0x2012)
#define P_GPIO_OEN_3 CBUS_REG_ADDR(0x2015)
#define P_GPIO_OEN_4 CBUS_REG_ADDR(0x2018)
#define P_GPIO_OEN_5 CBUS_REG_ADDR(0x201b)
#define P_GPIO_OUT_0 CBUS_REG_ADDR(0x200d)
#define P_GPIO_OUT_1 CBUS_REG_ADDR(0x2010)
#define P_GPIO_OUT_2 CBUS_REG_ADDR(0x2013)
#define P_GPIO_OUT_3 CBUS_REG_ADDR(0x2016)
#define P_GPIO_OUT_4 CBUS_REG_ADDR(0x2019)
#define P_GPIO_OUT_5 CBUS_REG_ADDR(0x201c)
#define P_GPIO_IN_0 CBUS_REG_ADDR(0x200e)
#define P_GPIO_IN_1 CBUS_REG_ADDR(0x2011)
#define P_GPIO_IN_2 CBUS_REG_ADDR(0x2014)
#define P_GPIO_IN_3 CBUS_REG_ADDR(0x2017)
#define P_GPIO_IN_4 CBUS_REG_ADDR(0x201a)
#define P_GPIO_IN_5 CBUS_REG_ADDR(0x201d)
#define P_GPIO_OEN_AO AOBUS_REG_ADDR_MASK(0xc8100024)
#define P_GPIO_OUT_AO AOBUS_REG_ADDR_MASK(0xc8100026)
#define P_GPIO_IN_AO AOBUS_REG_ADDR_MASK(0xc8100028)
#define REG0 (REG+0)
#define P_PIN_MUX_REG_0 CBUS_REG_ADDR(REG0)
#define REG1 (REG+1)
#define P_PIN_MUX_REG_1 CBUS_REG_ADDR(REG1)
#define REG2 (REG+2)
#define P_PIN_MUX_REG_2 CBUS_REG_ADDR(REG2)
#define REG3 (REG+3)
#define P_PIN_MUX_REG_3 CBUS_REG_ADDR(REG3)
#define REG4 (REG+4)
#define P_PIN_MUX_REG_4 CBUS_REG_ADDR(REG4)
#define REG5 (REG+5)
#define P_PIN_MUX_REG_5 CBUS_REG_ADDR(REG5)
#define REG6 (REG+6)
#define P_PIN_MUX_REG_6 CBUS_REG_ADDR(REG6)
#define REG7 (REG+7)
#define P_PIN_MUX_REG_7 CBUS_REG_ADDR(REG7)
#define REG8 (REG+8)
#define P_PIN_MUX_REG_8 CBUS_REG_ADDR(REG8)
#define P_PIN_MUX_REG_AO AOBUS_REG_ADDR(AO_REG)
#define P_GPIO_OUT(base,bit) (bit+(base<<5))
#define P_GPIO_OUT_NUM (sizeof(p_gpio_out_addr)/sizeof(p_gpio_out_addr[0]))
static unsigned p_gpio_out_addr[]={
	P_GPIO_OUT_0,
	P_GPIO_OUT_1,
	P_GPIO_OUT_2,
	P_GPIO_OUT_3,
	P_GPIO_OUT_4,
	P_GPIO_OUT_5,
	P_GPIO_OUT_AO,
};
#define P_GPIO_IN(base,bit) (bit+(base<<5))
#define P_GPIO_IN_NUM (sizeof(p_gpio_in_addr)/sizeof(p_gpio_in_addr[0]))
static unsigned p_gpio_in_addr[]={
	P_GPIO_IN_0,
	P_GPIO_IN_1,
	P_GPIO_IN_2,
	P_GPIO_IN_3,
	P_GPIO_IN_4,
	P_GPIO_IN_5,
	P_GPIO_IN_AO,
};
#define P_GPIO_OEN(base,bit) (bit+(base<<5))
#define P_GPIO_OEN_NUM (sizeof(p_gpio_oen_addr)/sizeof(p_gpio_oen_addr[0]))
static unsigned p_gpio_oen_addr[]={
	P_GPIO_OEN_0,
	P_GPIO_OEN_1,
	P_GPIO_OEN_2,
	P_GPIO_OEN_3,
	P_GPIO_OEN_4,
	P_GPIO_OEN_5,
	P_GPIO_OEN_AO,
};
#define P_PIN_MUX_REG(base,bit) (bit+(base<<5))
#define P_PIN_MUX_REG_NUM (sizeof(p_pin_mux_reg_addr)/sizeof(p_pin_mux_reg_addr[0]))
static unsigned p_pin_mux_reg_addr[]={
	P_PIN_MUX_REG_0,
	P_PIN_MUX_REG_1,
	P_PIN_MUX_REG_2,
	P_PIN_MUX_REG_3,
	P_PIN_MUX_REG_4,
	P_PIN_MUX_REG_5,
	P_PIN_MUX_REG_6,
	P_PIN_MUX_REG_7,
	P_PIN_MUX_REG_8,
	P_PIN_MUX_REG_AO,
};
#define NOT_EXIST -1
struct pad_sig {pad_t pad;sig_t sig;unsigned enable; unsigned disable;};
#define foreach_pad_sig_start(pad,sig) {int __i;for(__i=0;__i<sizeof(pad_sig_tab)/sizeof(pad_sig_tab[0]);__i++){ unsigned __pad=pad,__sig=sig;  
#define case_pad_equal(enable,disable) if(pad_sig_tab[__i].pad==__pad&&pad_sig_tab[__i].sig!=__sig){ enable=pad_sig_tab[__i].enable;disable=pad_sig_tab[__i].disable
#define case_sig_equal(enable,disable) if(pad_sig_tab[__i].pad!=__pad&&pad_sig_tab[__i].sig==__sig){enable=pad_sig_tab[__i].enable;disable=pad_sig_tab[__i].disable
#define case_both_equal(enable,disable) if(pad_sig_tab[__i].pad==__pad&&pad_sig_tab[__i].sig==__sig){enable=pad_sig_tab[__i].enable;disable=pad_sig_tab[__i].disable
#define case_end };
#define foreach_pad_sig_end };}
static struct pad_sig pad_sig_tab[]={
	{.pad=PAD_GPIOA_14,.sig=SIG_ENC_2,.enable=P_PIN_MUX_REG(7,2),.disable=NOT_EXIST},
	{.pad=PAD_GPIOA_0,.sig=SIG_LCDin_R0,.enable=P_PIN_MUX_REG(0,6),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_7,.sig=SIG_I2S_AM_CLK,.enable=P_PIN_MUX_REG(7,27),.disable=NOT_EXIST},
	{.pad=PAD_GPIOY_10,.sig=SIG_FIR,.enable=P_PIN_MUX_REG(8,11),.disable=NOT_EXIST},
	{.pad=PAD_GPIOC_9,.sig=SIG_PWM_C,.enable=P_PIN_MUX_REG(3,25),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_16,.sig=SIG_FEC_D0_OUT,.enable=P_PIN_MUX_REG(3,13),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_8,.sig=SIG_LCD_G0,.enable=P_PIN_MUX_REG(0,3),.disable=NOT_EXIST},
	{.pad=PAD_BOOT_13,.sig=SIG_SPI_NOR_Q_A,.enable=P_PIN_MUX_REG(5,3),.disable=P_PIN_MUX_REG(5,9)},
	{.pad=PAD_GPIOAO_3,.sig=SIG_I2C_SDA_SLAVE,.enable=P_PIN_MUX_REG(9,3),.disable=NOT_EXIST},
	{.pad=PAD_CARD_2,.sig=SIG_SD_D2_B,.enable=P_PIN_MUX_REG(2,13),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_3,.sig=SIG_SD_D3_A,.enable=P_PIN_MUX_REG(8,2),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_2,.sig=SIG_LCD_R2,.enable=P_PIN_MUX_REG(0,0),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_17,.sig=SIG_LCD_B1,.enable=P_PIN_MUX_REG(0,5),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_8,.sig=SIG_FEC_CLK_B,.enable=P_PIN_MUX_REG(3,9),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_1,.sig=SIG_FEC_D1_B,.enable=P_PIN_MUX_REG(3,11),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_2,.sig=SIG_SDXC_D2_A,.enable=P_PIN_MUX_REG(5,13),.disable=NOT_EXIST},
	{.pad=PAD_GPIOD_6,.sig=SIG_TCON_4_B,.enable=P_PIN_MUX_REG(0,26),.disable=NOT_EXIST},
	{.pad=PAD_GPIOC_1,.sig=SIG_VGA_VS,.enable=P_PIN_MUX_REG(0,20),.disable=NOT_EXIST},
	{.pad=PAD_GPIOAO_8,.sig=SIG_JTAG_TCK,.enable=P_PIN_MUX_REG(9,14),.disable=P_PIN_MUX_REG(9,13)},
	{.pad=PAD_GPIOA_5,.sig=SIG_FEC_D5_A,.enable=P_PIN_MUX_REG(3,5),.disable=NOT_EXIST},
	{.pad=PAD_BOOT_5,.sig=SIG_NAND_IO_5,.enable=P_PIN_MUX_REG(2,26),.disable=NOT_EXIST},
	{.pad=PAD_GPIOY_15,.sig=SIG_D2,.enable=P_PIN_MUX_REG(8,7),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_6,.sig=SIG_I2S_LR_CLK_audio_out,.enable=P_PIN_MUX_REG(7,22),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_7,.sig=SIG_LCD_R7,.enable=P_PIN_MUX_REG(0,0),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_5,.sig=SIG_SDXC_D5_A,.enable=P_PIN_MUX_REG(5,12),.disable=NOT_EXIST},
	{.pad=PAD_GPIOA_8,.sig=SIG_FEC_CLK_A,.enable=P_PIN_MUX_REG(3,0),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_1,.sig=SIG_SD_D1_A,.enable=P_PIN_MUX_REG(8,4),.disable=NOT_EXIST},
	{.pad=PAD_GPIOAO_3,.sig=SIG_UART_RTS,.enable=P_PIN_MUX_REG(9,9),.disable=NOT_EXIST},
	{.pad=PAD_GPIOD_7,.sig=SIG_TCON_CPH1,.enable=P_PIN_MUX_REG(1,14),.disable=NOT_EXIST},
	{.pad=PAD_GPIOY_5,.sig=SIG_RMII_TX_EN,.enable=P_PIN_MUX_REG(6,12),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_19,.sig=SIG_UART_CTS_B,.enable=P_PIN_MUX_REG(4,7),.disable=NOT_EXIST},
	{.pad=PAD_BOOT_0,.sig=SIG_NAND_IO_0,.enable=P_PIN_MUX_REG(2,26),.disable=NOT_EXIST},
	{.pad=PAD_GPIOA_22,.sig=SIG_LCDin_B6,.enable=P_PIN_MUX_REG(0,6),.disable=NOT_EXIST},
	{.pad=PAD_GPIOA_13,.sig=SIG_LCDin_G5,.enable=P_PIN_MUX_REG(0,6),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_5,.sig=SIG_PCM_IN,.enable=P_PIN_MUX_REG(3,29),.disable=NOT_EXIST},
	{.pad=PAD_GPIOA_24,.sig=SIG_ENC_12,.enable=P_PIN_MUX_REG(7,12),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_17,.sig=SIG_I2S_AM_CLK_audio_out,.enable=P_PIN_MUX_REG(8,27),.disable=NOT_EXIST},
	{.pad=PAD_GPIOA_27,.sig=SIG_LCDin_DE,.enable=P_PIN_MUX_REG(0,10),.disable=NOT_EXIST},
	{.pad=PAD_GPIOA_5,.sig=SIG_FEC_SOP_C,.enable=P_PIN_MUX_REG(6,21),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_15,.sig=SIG_UART_CTS_A,.enable=P_PIN_MUX_REG(4,11),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_29,.sig=SIG_SPI_SS2,.enable=P_PIN_MUX_REG(8,18),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_15,.sig=SIG_FEC_CLK_OUT,.enable=P_PIN_MUX_REG(3,14),.disable=NOT_EXIST},
	{.pad=PAD_GPIOC_0,.sig=SIG_LCD_VGHL_PWM,.enable=P_PIN_MUX_REG(1,27),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_32,.sig=SIG_SPI_SS1,.enable=P_PIN_MUX_REG(8,15),.disable=NOT_EXIST},
	{.pad=PAD_GPIOY_7,.sig=SIG_RMII_TX_DATA0,.enable=P_PIN_MUX_REG(6,10),.disable=NOT_EXIST},
	{.pad=PAD_GPIOY_0,.sig=SIG_RMII_CLK50_IN,.enable=P_PIN_MUX_REG(6,18),.disable=NOT_EXIST},
	{.pad=PAD_GPIOD_3,.sig=SIG_TCON_1_B,.enable=P_PIN_MUX_REG(0,23),.disable=NOT_EXIST},
	{.pad=PAD_BOOT_0,.sig=SIG_I2C_SDA,.enable=P_PIN_MUX_REG(3,31),.disable=NOT_EXIST},
	{.pad=PAD_BOOT_12,.sig=SIG_NAND_ALE,.enable=P_PIN_MUX_REG(2,21),.disable=NOT_EXIST},
	{.pad=PAD_GPIOA_2,.sig=SIG_FEC_D2_A,.enable=P_PIN_MUX_REG(3,5),.disable=NOT_EXIST},
	{.pad=PAD_GPIOC_7,.sig=SIG_TCON_5_A,.enable=P_PIN_MUX_REG(0,17),.disable=NOT_EXIST},
	{.pad=PAD_GPIOA_5,.sig=SIG_LCDin_R5,.enable=P_PIN_MUX_REG(0,6),.disable=NOT_EXIST},
	{.pad=PAD_GPIOC_6,.sig=SIG_TCON_OEV1,.enable=P_PIN_MUX_REG(1,5),.disable=NOT_EXIST},
	{.pad=PAD_GPIOC_11,.sig=SIG_HDMI_SDA_5V,.enable=P_PIN_MUX_REG(1,23),.disable=NOT_EXIST},
	{.pad=PAD_BOOT_0,.sig=SIG_SDXC_D0_C,.enable=P_PIN_MUX_REG(4,30),.disable=NOT_EXIST},
	{.pad=PAD_GPIOY_2,.sig=SIG_RMII_CRS_DV,.enable=P_PIN_MUX_REG(6,15),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_20,.sig=SIG_ISO7816_DATA,.enable=P_PIN_MUX_REG(4,18),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_29,.sig=SIG_I2C_SDA_slave,.enable=P_PIN_MUX_REG(8,20),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_16,.sig=SIG_UART_RTS_A,.enable=P_PIN_MUX_REG(4,10),.disable=NOT_EXIST},
	{.pad=PAD_GPIOC_7,.sig=SIG_TCON_CPH3,.enable=P_PIN_MUX_REG(1,2),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_23,.sig=SIG_LCD_B7,.enable=P_PIN_MUX_REG(0,4),.disable=NOT_EXIST},
	{.pad=PAD_GPIOC_0,.sig=SIG_PWM_A,.enable=P_PIN_MUX_REG(2,0),.disable=NOT_EXIST},
	{.pad=PAD_BOOT_13,.sig=SIG_NAND_CLE,.enable=P_PIN_MUX_REG(2,20),.disable=NOT_EXIST},
	{.pad=PAD_GPIOY_21,.sig=SIG_CLK,.enable=P_PIN_MUX_REG(8,6),.disable=NOT_EXIST},
	{.pad=PAD_CARD_0,.sig=SIG_SD_D0_B,.enable=P_PIN_MUX_REG(2,15),.disable=NOT_EXIST},
	{.pad=PAD_BOOT_3,.sig=SIG_SDXC_D3_C,.enable=P_PIN_MUX_REG(4,29),.disable=NOT_EXIST},
	{.pad=PAD_GPIOA_19,.sig=SIG_ENC_7,.enable=P_PIN_MUX_REG(7,7),.disable=NOT_EXIST},
	{.pad=PAD_GPIOAO_9,.sig=SIG_JTAG_TMS,.enable=P_PIN_MUX_REG(9,14),.disable=P_PIN_MUX_REG(9,13)},
	{.pad=PAD_GPIOD_8,.sig=SIG_TCON_VCOM_B,.enable=P_PIN_MUX_REG(1,20),.disable=NOT_EXIST},
	{.pad=PAD_BOOT_8,.sig=SIG_NAND_CE0,.enable=P_PIN_MUX_REG(2,25),.disable=NOT_EXIST},
	{.pad=PAD_GPIOC_4,.sig=SIG_TCON_2_A,.enable=P_PIN_MUX_REG(0,14),.disable=NOT_EXIST},
	{.pad=PAD_BOOT_6,.sig=SIG_SDXC_D6_C,.enable=P_PIN_MUX_REG(4,28),.disable=NOT_EXIST},
	{.pad=PAD_GPIOC_5,.sig=SIG_TCON_CPV1,.enable=P_PIN_MUX_REG(1,6),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_13,.sig=SIG_LCD_G5,.enable=P_PIN_MUX_REG(0,2),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_17,.sig=SIG_FEC_D1_OUT,.enable=P_PIN_MUX_REG(3,12),.disable=NOT_EXIST},
	{.pad=PAD_GPIOD_0,.sig=SIG_PWM_C,.enable=P_PIN_MUX_REG(2,2),.disable=NOT_EXIST},
	{.pad=PAD_GPIOY_16,.sig=SIG_D3,.enable=P_PIN_MUX_REG(8,7),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_27,.sig=SIG_I2C_SDA,.enable=P_PIN_MUX_REG(5,31),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_13,.sig=SIG_FEC_D_VALID_OUT,.enable=P_PIN_MUX_REG(3,16),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_17,.sig=SIG_ISO7816_DET,.enable=P_PIN_MUX_REG(4,21),.disable=NOT_EXIST},
	{.pad=PAD_GPIOA_1,.sig=SIG_LCDin_R1,.enable=P_PIN_MUX_REG(0,6),.disable=NOT_EXIST},
	{.pad=PAD_TEST_N,.sig=SIG_WD_GPIO,.enable=P_PIN_MUX_REG(9,20),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_22,.sig=SIG_FEC_D6_OUT,.enable=P_PIN_MUX_REG(3,12),.disable=NOT_EXIST},
	{.pad=PAD_GPIOAO_11,.sig=SIG_JTAG_TDO,.enable=P_PIN_MUX_REG(9,14),.disable=P_PIN_MUX_REG(9,13)},
	{.pad=PAD_GPIOB_4,.sig=SIG_LCD_R4,.enable=P_PIN_MUX_REG(0,0),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_19,.sig=SIG_LCD_B3,.enable=P_PIN_MUX_REG(0,4),.disable=NOT_EXIST},
	{.pad=PAD_GPIOA_8,.sig=SIG_LCDin_G0,.enable=P_PIN_MUX_REG(0,6),.disable=NOT_EXIST},
	{.pad=PAD_GPIOD_9,.sig=SIG_PWM_A,.enable=P_PIN_MUX_REG(3,26),.disable=NOT_EXIST},
	{.pad=PAD_BOOT_7,.sig=SIG_NAND_IO_7,.enable=P_PIN_MUX_REG(2,26),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_12,.sig=SIG_I2S_AO_CLK_audio_out,.enable=P_PIN_MUX_REG(7,24),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_34,.sig=SIG_SPI_MOSI,.enable=P_PIN_MUX_REG(8,13),.disable=NOT_EXIST},
	{.pad=PAD_GPIOA_16,.sig=SIG_ENC_4,.enable=P_PIN_MUX_REG(7,4),.disable=NOT_EXIST},
	{.pad=PAD_BOOT_17,.sig=SIG_SPI_NOR_CS_n_A,.enable=P_PIN_MUX_REG(5,0),.disable=P_PIN_MUX_REG(5,6)},
	{.pad=PAD_GPIOY_4,.sig=SIG_RMII_RX_DATA0,.enable=P_PIN_MUX_REG(6,13),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_9,.sig=SIG_SD_CMD_A,.enable=P_PIN_MUX_REG(8,0),.disable=NOT_EXIST},
	{.pad=PAD_GPIOA_16,.sig=SIG_LCDin_B0,.enable=P_PIN_MUX_REG(0,6),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_5,.sig=SIG_FEC_D5_B,.enable=P_PIN_MUX_REG(3,11),.disable=NOT_EXIST},
	{.pad=PAD_BOOT_2,.sig=SIG_SD_D2_C,.enable=P_PIN_MUX_REG(6,27),.disable=NOT_EXIST},
	{.pad=PAD_BOOT_2,.sig=SIG_NAND_IO_2,.enable=P_PIN_MUX_REG(2,26),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_1,.sig=SIG_SDXC_D1_A,.enable=P_PIN_MUX_REG(5,13),.disable=NOT_EXIST},
	{.pad=PAD_GPIOA_26,.sig=SIG_ENC_14,.enable=P_PIN_MUX_REG(7,14),.disable=NOT_EXIST},
	{.pad=PAD_BOOT_16,.sig=SIG_NAND_DQS,.enable=P_PIN_MUX_REG(2,27),.disable=NOT_EXIST},
	{.pad=PAD_GPIOY_22,.sig=SIG_CLK_OUT,.enable=P_PIN_MUX_REG(3,21),.disable=NOT_EXIST},
	{.pad=PAD_CARD_0,.sig=SIG_SDXC_D0_B,.enable=P_PIN_MUX_REG(2,7),.disable=NOT_EXIST},
	{.pad=PAD_BOOT_10,.sig=SIG_SDXC_CMD_C,.enable=P_PIN_MUX_REG(4,27),.disable=NOT_EXIST},
	{.pad=PAD_GPIOAO_6,.sig=SIG_WD_GPIO,.enable=P_PIN_MUX_REG(9,19),.disable=NOT_EXIST},
	{.pad=PAD_CARD_5,.sig=SIG_SD_CMD_B,.enable=P_PIN_MUX_REG(2,10),.disable=NOT_EXIST},
	{.pad=PAD_GPIOA_23,.sig=SIG_LCDin_B7,.enable=P_PIN_MUX_REG(0,6),.disable=NOT_EXIST},
	{.pad=PAD_GPIOA_14,.sig=SIG_LCDin_G6,.enable=P_PIN_MUX_REG(0,6),.disable=NOT_EXIST},
	{.pad=PAD_BOOT_11,.sig=SIG_SD_CLK_C,.enable=P_PIN_MUX_REG(6,24),.disable=NOT_EXIST},
	{.pad=PAD_GPIOA_9,.sig=SIG_FEC_SOP_A,.enable=P_PIN_MUX_REG(3,1),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_4,.sig=SIG_SDXC_D4_A,.enable=P_PIN_MUX_REG(5,12),.disable=NOT_EXIST},
	{.pad=PAD_BOOT_0,.sig=SIG_SD_D0_C,.enable=P_PIN_MUX_REG(6,29),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_35,.sig=SIG_SPI_MISO,.enable=P_PIN_MUX_REG(8,12),.disable=NOT_EXIST},
	{.pad=PAD_GPIOA_20,.sig=SIG_ENC_8,.enable=P_PIN_MUX_REG(7,8),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_9,.sig=SIG_SDXC_CMD_A,.enable=P_PIN_MUX_REG(5,10),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_28,.sig=SIG_I2C_SCK_slave,.enable=P_PIN_MUX_REG(5,28),.disable=NOT_EXIST},
	{.pad=PAD_GPIOY_8,.sig=SIG_RMII_MDC,.enable=P_PIN_MUX_REG(6,9),.disable=NOT_EXIST},
	{.pad=PAD_CARD_3,.sig=SIG_SDXC_D3_B,.enable=P_PIN_MUX_REG(2,6),.disable=NOT_EXIST},
	{.pad=PAD_GPIOD_7,.sig=SIG_TCON_CPH50_B,.enable=P_PIN_MUX_REG(1,11),.disable=NOT_EXIST},
	{.pad=PAD_GPIOAO_0,.sig=SIG_UART_TX,.enable=P_PIN_MUX_REG(9,12),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_22,.sig=SIG_ISO7816_RESET,.enable=P_PIN_MUX_REG(4,16),.disable=NOT_EXIST},
	{.pad=PAD_GPIOC_1,.sig=SIG_LED_BL_PWM,.enable=P_PIN_MUX_REG(1,26),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_20,.sig=SIG_LCD_B4,.enable=P_PIN_MUX_REG(0,4),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_7,.sig=SIG_SDXC_D7_A,.enable=P_PIN_MUX_REG(5,12),.disable=NOT_EXIST},
	{.pad=PAD_GPIOY_17,.sig=SIG_D4,.enable=P_PIN_MUX_REG(8,7),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_30,.sig=SIG_SPI_RDYn,.enable=P_PIN_MUX_REG(8,17),.disable=NOT_EXIST},
	{.pad=PAD_GPIOA_6,.sig=SIG_LCDin_R6,.enable=P_PIN_MUX_REG(0,6),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_2,.sig=SIG_FEC_D2_B,.enable=P_PIN_MUX_REG(3,11),.disable=NOT_EXIST},
	{.pad=PAD_GPIOD_7,.sig=SIG_TCON_5_B,.enable=P_PIN_MUX_REG(0,27),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_17,.sig=SIG_SYS_PLL_2,.enable=P_PIN_MUX_REG(5,17),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_26,.sig=SIG_I2C_SCK,.enable=P_PIN_MUX_REG(5,26),.disable=NOT_EXIST},
	{.pad=PAD_GPIOD_9,.sig=SIG_ENC_16,.enable=P_PIN_MUX_REG(7,16),.disable=NOT_EXIST},
	{.pad=PAD_GPIOA_6,.sig=SIG_FEC_D6_A,.enable=P_PIN_MUX_REG(3,5),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_4,.sig=SIG_PCM_OUT,.enable=P_PIN_MUX_REG(3,30),.disable=NOT_EXIST},
	{.pad=PAD_GPIOA_13,.sig=SIG_ENC_1,.enable=P_PIN_MUX_REG(7,1),.disable=NOT_EXIST},
	{.pad=PAD_GPIOA_23,.sig=SIG_ENC_11,.enable=P_PIN_MUX_REG(7,11),.disable=NOT_EXIST},
	{.pad=PAD_GPIOAO_2,.sig=SIG_I2C_CLK_SLAVE,.enable=P_PIN_MUX_REG(9,4),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_10,.sig=SIG_LCD_G2,.enable=P_PIN_MUX_REG(0,2),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_9,.sig=SIG_FEC_SOP_B,.enable=P_PIN_MUX_REG(3,8),.disable=NOT_EXIST},
	{.pad=PAD_GPIOA_7,.sig=SIG_FEC_FAIL_C,.enable=P_PIN_MUX_REG(6,19),.disable=NOT_EXIST},
	{.pad=PAD_BOOT_4,.sig=SIG_NAND_IO_4,.enable=P_PIN_MUX_REG(2,26),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_6,.sig=SIG_PCM_FS,.enable=P_PIN_MUX_REG(3,28),.disable=NOT_EXIST},
	{.pad=PAD_GPIOAO_3,.sig=SIG_I2C_SDA,.enable=P_PIN_MUX_REG(9,7),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_14,.sig=SIG_AUD_PLL,.enable=P_PIN_MUX_REG(5,20),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_15,.sig=SIG_LCD_G7,.enable=P_PIN_MUX_REG(0,2),.disable=NOT_EXIST},
	{.pad=PAD_GPIOC_8,.sig=SIG_SPDIF_in,.enable=P_PIN_MUX_REG(3,23),.disable=NOT_EXIST},
	{.pad=PAD_BOOT_1,.sig=SIG_I2C_SCL,.enable=P_PIN_MUX_REG(3,31),.disable=NOT_EXIST},
	{.pad=PAD_BOOT_9,.sig=SIG_NAND_CE1,.enable=P_PIN_MUX_REG(2,24),.disable=NOT_EXIST},
	{.pad=PAD_GPIOA_10,.sig=SIG_LCDin_G2,.enable=P_PIN_MUX_REG(0,6),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_20,.sig=SIG_PCM_IN,.enable=P_PIN_MUX_REG(4,22),.disable=NOT_EXIST},
	{.pad=PAD_BOOT_2,.sig=SIG_SDXC_D2_C,.enable=P_PIN_MUX_REG(4,29),.disable=NOT_EXIST},
	{.pad=PAD_GPIOD_4,.sig=SIG_TCON_2_B,.enable=P_PIN_MUX_REG(0,24),.disable=NOT_EXIST},
	{.pad=PAD_BOOT_10,.sig=SIG_NAND_CE2,.enable=P_PIN_MUX_REG(2,23),.disable=NOT_EXIST},
	{.pad=PAD_GPIOC_15,.sig=SIG_CLK_OUT,.enable=P_PIN_MUX_REG(3,22),.disable=NOT_EXIST},
	{.pad=PAD_GPIOA_3,.sig=SIG_FEC_D3_A,.enable=P_PIN_MUX_REG(3,5),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_1,.sig=SIG_LCD_R1,.enable=P_PIN_MUX_REG(0,0),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_16,.sig=SIG_LCD_B0,.enable=P_PIN_MUX_REG(0,5),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_15,.sig=SIG_VID_PLL,.enable=P_PIN_MUX_REG(5,19),.disable=NOT_EXIST},
	{.pad=PAD_GPIOC_8,.sig=SIG_TCON_6_A,.enable=P_PIN_MUX_REG(0,18),.disable=NOT_EXIST},
	{.pad=PAD_GPIOA_26,.sig=SIG_LCDin_VS,.enable=P_PIN_MUX_REG(0,9),.disable=NOT_EXIST},
	{.pad=PAD_BOOT_5,.sig=SIG_SDXC_D5_C,.enable=P_PIN_MUX_REG(4,28),.disable=NOT_EXIST},
	{.pad=PAD_GPIOY_6,.sig=SIG_RMII_TX_DATA1,.enable=P_PIN_MUX_REG(6,11),.disable=NOT_EXIST},
	{.pad=PAD_GPIOA_6,.sig=SIG_FEC_D_VALID_C,.enable=P_PIN_MUX_REG(6,20),.disable=NOT_EXIST},
	{.pad=PAD_GPIOA_2,.sig=SIG_LCDin_R2,.enable=P_PIN_MUX_REG(0,6),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_19,.sig=SIG_I2S_LR_CLK,.enable=P_PIN_MUX_REG(8,29),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_6,.sig=SIG_LCD_R6,.enable=P_PIN_MUX_REG(0,0),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_18,.sig=SIG_ISO7816_RESET,.enable=P_PIN_MUX_REG(4,20),.disable=NOT_EXIST},
	{.pad=PAD_GPIOA_9,.sig=SIG_LCDin_G1,.enable=P_PIN_MUX_REG(0,6),.disable=NOT_EXIST},
	{.pad=PAD_BOOT_10,.sig=SIG_NAND_RB0,.enable=P_PIN_MUX_REG(2,17),.disable=NOT_EXIST},
	{.pad=PAD_GPIOD_7,.sig=SIG_TCON_CPH3,.enable=P_PIN_MUX_REG(1,12),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_18,.sig=SIG_FEC_D2_OUT,.enable=P_PIN_MUX_REG(3,12),.disable=NOT_EXIST},
	{.pad=PAD_GPIOY_18,.sig=SIG_D5,.enable=P_PIN_MUX_REG(8,7),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_12,.sig=SIG_I2S_AO_CLK,.enable=P_PIN_MUX_REG(7,28),.disable=NOT_EXIST},
	{.pad=PAD_GPIOA_0,.sig=SIG_FEC_D0_A,.enable=P_PIN_MUX_REG(3,4),.disable=NOT_EXIST},
	{.pad=PAD_GPIOC_5,.sig=SIG_TCON_3_A,.enable=P_PIN_MUX_REG(0,15),.disable=NOT_EXIST},
	{.pad=PAD_CARD_3,.sig=SIG_SD_D3_B,.enable=P_PIN_MUX_REG(2,12),.disable=NOT_EXIST},
	{.pad=PAD_GPIOC_7,.sig=SIG_TCON_CPH2,.enable=P_PIN_MUX_REG(1,3),.disable=NOT_EXIST},
	{.pad=PAD_GPIOA_17,.sig=SIG_LCDin_B1,.enable=P_PIN_MUX_REG(0,6),.disable=NOT_EXIST},
	{.pad=PAD_GPIOA_3,.sig=SIG_FEC_D0_C,.enable=P_PIN_MUX_REG(6,23),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_23,.sig=SIG_FEC_D7_OUT,.enable=P_PIN_MUX_REG(3,12),.disable=NOT_EXIST},
	{.pad=PAD_GPIOA_10,.sig=SIG_FEC_D_VALID_A,.enable=P_PIN_MUX_REG(3,2),.disable=NOT_EXIST},
	{.pad=PAD_GPIOA_15,.sig=SIG_LCDin_G7,.enable=P_PIN_MUX_REG(0,6),.disable=NOT_EXIST},
	{.pad=PAD_BOOT_14,.sig=SIG_SPI_NOR_C_A,.enable=P_PIN_MUX_REG(5,2),.disable=P_PIN_MUX_REG(5,8)},
	{.pad=PAD_GPIOY_12,.sig=SIG_VS,.enable=P_PIN_MUX_REG(8,9),.disable=NOT_EXIST},
	{.pad=PAD_GPIOA_18,.sig=SIG_ENC_6,.enable=P_PIN_MUX_REG(7,6),.disable=NOT_EXIST},
	{.pad=PAD_GPIOC_9,.sig=SIG_ENC_17,.enable=P_PIN_MUX_REG(7,17),.disable=NOT_EXIST},
	{.pad=PAD_CARD_1,.sig=SIG_SD_D1_B,.enable=P_PIN_MUX_REG(2,14),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_27,.sig=SIG_I2C_SDA_slave,.enable=P_PIN_MUX_REG(5,29),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_13,.sig=SIG_UART_TX_A,.enable=P_PIN_MUX_REG(4,13),.disable=NOT_EXIST},
	{.pad=PAD_GPIOA_24,.sig=SIG_LCDin_CLK,.enable=P_PIN_MUX_REG(0,7),.disable=NOT_EXIST},
	{.pad=PAD_GPIOAO_11,.sig=SIG_CLK_OUT,.enable=P_PIN_MUX_REG(9,21),.disable=NOT_EXIST},
	{.pad=PAD_GPIOC_9,.sig=SIG_SPDIF_out,.enable=P_PIN_MUX_REG(3,24),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_22,.sig=SIG_LCD_B6,.enable=P_PIN_MUX_REG(0,4),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_33,.sig=SIG_SPI_SCLK,.enable=P_PIN_MUX_REG(8,14),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_2,.sig=SIG_SD_D2_A,.enable=P_PIN_MUX_REG(8,3),.disable=NOT_EXIST},
	{.pad=PAD_GPIOAO_2,.sig=SIG_I2C_SCK,.enable=P_PIN_MUX_REG(9,8),.disable=NOT_EXIST},
	{.pad=PAD_CARD_5,.sig=SIG_SDXC_CMD_B,.enable=P_PIN_MUX_REG(2,4),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_14,.sig=SIG_UART_RX_A,.enable=P_PIN_MUX_REG(4,12),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_23,.sig=SIG_ISO7816_CLK,.enable=P_PIN_MUX_REG(4,15),.disable=NOT_EXIST},
	{.pad=PAD_GPIOAO_10,.sig=SIG_JTAG_TDI,.enable=P_PIN_MUX_REG(9,14),.disable=P_PIN_MUX_REG(9,13)},
	{.pad=PAD_GPIOC_2,.sig=SIG_TCON_0_A,.enable=P_PIN_MUX_REG(0,12),.disable=NOT_EXIST},
	{.pad=PAD_GPIOY_9,.sig=SIG_RMII_MDIO,.enable=P_PIN_MUX_REG(6,8),.disable=NOT_EXIST},
	{.pad=PAD_GPIOA_7,.sig=SIG_LCDin_R7,.enable=P_PIN_MUX_REG(0,6),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_18,.sig=SIG_PCM_FS,.enable=P_PIN_MUX_REG(4,24),.disable=NOT_EXIST},
	{.pad=PAD_GPIOC_2,.sig=SIG_TCON_STH1,.enable=P_PIN_MUX_REG(1,9),.disable=NOT_EXIST},
	{.pad=PAD_CARD_2,.sig=SIG_SDXC_D2_B,.enable=P_PIN_MUX_REG(2,6),.disable=NOT_EXIST},
	{.pad=PAD_CARD_4,.sig=SIG_SD_CLK_B,.enable=P_PIN_MUX_REG(2,11),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_12,.sig=SIG_DDR_PLL,.enable=P_PIN_MUX_REG(5,22),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_7,.sig=SIG_I2S_AM_CLK_audio_out,.enable=P_PIN_MUX_REG(7,23),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_12,.sig=SIG_LCD_G4,.enable=P_PIN_MUX_REG(0,2),.disable=NOT_EXIST},
	{.pad=PAD_GPIOAO_7,.sig=SIG_REMOTE,.enable=P_PIN_MUX_REG(9,0),.disable=NOT_EXIST},
	{.pad=PAD_GPIOY_10,.sig=SIG_IDQ,.enable=P_PIN_MUX_REG(8,10),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_11,.sig=SIG_FEC_FAIL_B,.enable=P_PIN_MUX_REG(3,6),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_30,.sig=SIG_I2C_SCK_slave,.enable=P_PIN_MUX_REG(8,19),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_6,.sig=SIG_FEC_D6_B,.enable=P_PIN_MUX_REG(3,11),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_29,.sig=SIG_I2C_SDA,.enable=P_PIN_MUX_REG(8,22),.disable=NOT_EXIST},
	{.pad=PAD_BOOT_6,.sig=SIG_NAND_IO_6,.enable=P_PIN_MUX_REG(2,26),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_9,.sig=SIG_LCD_G1,.enable=P_PIN_MUX_REG(0,3),.disable=NOT_EXIST},
	{.pad=PAD_GPIOAO_5,.sig=SIG_I2C_SDA_SLAVE,.enable=P_PIN_MUX_REG(9,1),.disable=NOT_EXIST},
	{.pad=PAD_GPIOY_19,.sig=SIG_D6,.enable=P_PIN_MUX_REG(8,7),.disable=NOT_EXIST},
	{.pad=PAD_GPIOC_13,.sig=SIG_HDMI_CEC,.enable=P_PIN_MUX_REG(1,25),.disable=NOT_EXIST},
	{.pad=PAD_BOOT_1,.sig=SIG_NAND_IO_1,.enable=P_PIN_MUX_REG(2,26),.disable=NOT_EXIST},
	{.pad=PAD_GPIOA_20,.sig=SIG_LCDin_B4,.enable=P_PIN_MUX_REG(0,6),.disable=NOT_EXIST},
	{.pad=PAD_GPIOA_11,.sig=SIG_LCDin_G3,.enable=P_PIN_MUX_REG(0,6),.disable=NOT_EXIST},
	{.pad=PAD_GPIOA_15,.sig=SIG_ENC_3,.enable=P_PIN_MUX_REG(7,3),.disable=NOT_EXIST},
	{.pad=PAD_GPIOC_8,.sig=SIG_TCON_VCOM,.enable=P_PIN_MUX_REG(1,10),.disable=NOT_EXIST},
	{.pad=PAD_GPIOA_11,.sig=SIG_FEC_FAIL_A,.enable=P_PIN_MUX_REG(3,3),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_3,.sig=SIG_LCD_R3,.enable=P_PIN_MUX_REG(0,0),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_18,.sig=SIG_LCD_B2,.enable=P_PIN_MUX_REG(0,4),.disable=NOT_EXIST},
	{.pad=PAD_GPIOD_3,.sig=SIG_TCON_STV1_B,.enable=P_PIN_MUX_REG(1,18),.disable=NOT_EXIST},
	{.pad=PAD_BOOT_11,.sig=SIG_NAND_CE3,.enable=P_PIN_MUX_REG(2,22),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_12,.sig=SIG_FEC_FAIL_OUT,.enable=P_PIN_MUX_REG(3,17),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_23,.sig=SIG_UART_CTS_C,.enable=P_PIN_MUX_REG(4,1),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_20,.sig=SIG_FEC_D4_OUT,.enable=P_PIN_MUX_REG(3,12),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_0,.sig=SIG_SDXC_D0_A,.enable=P_PIN_MUX_REG(5,14),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_3,.sig=SIG_FEC_D3_B,.enable=P_PIN_MUX_REG(3,11),.disable=NOT_EXIST},
	{.pad=PAD_GPIOD_8,.sig=SIG_TCON_6_B,.enable=P_PIN_MUX_REG(0,28),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_8,.sig=SIG_SD_CLK_A,.enable=P_PIN_MUX_REG(8,1),.disable=NOT_EXIST},
	{.pad=PAD_GPIOA_7,.sig=SIG_FEC_D7_A,.enable=P_PIN_MUX_REG(3,5),.disable=NOT_EXIST},
	{.pad=PAD_GPIOA_3,.sig=SIG_LCDin_R3,.enable=P_PIN_MUX_REG(0,6),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_3,.sig=SIG_SDXC_D3_A,.enable=P_PIN_MUX_REG(5,13),.disable=NOT_EXIST},
	{.pad=PAD_GPIOC_12,.sig=SIG_HDMI_SCL_5V,.enable=P_PIN_MUX_REG(1,24),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_10,.sig=SIG_FEC_D_VALID_B,.enable=P_PIN_MUX_REG(3,7),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_0,.sig=SIG_SD_D0_A,.enable=P_PIN_MUX_REG(8,5),.disable=NOT_EXIST},
	{.pad=PAD_GPIOA_25,.sig=SIG_ENC_13,.enable=P_PIN_MUX_REG(7,13),.disable=NOT_EXIST},
	{.pad=PAD_GPIOC_10,.sig=SIG_HDMI_HPD_5V,.enable=P_PIN_MUX_REG(1,22),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_6,.sig=SIG_SDXC_D6_A,.enable=P_PIN_MUX_REG(5,12),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_8,.sig=SIG_SDXC_CLK_A,.enable=P_PIN_MUX_REG(5,11),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_24,.sig=SIG_UART_RTS_C,.enable=P_PIN_MUX_REG(4,0),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_31,.sig=SIG_SPI_SS0,.enable=P_PIN_MUX_REG(8,16),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_21,.sig=SIG_UART_TX_C,.enable=P_PIN_MUX_REG(4,3),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_26,.sig=SIG_I2C_SCK_slave,.enable=P_PIN_MUX_REG(5,24),.disable=NOT_EXIST},
	{.pad=PAD_GPIOY_0,.sig=SIG_CLK_OUT,.enable=P_PIN_MUX_REG(6,17),.disable=NOT_EXIST},
	{.pad=PAD_GPIOA_25,.sig=SIG_LCDin_HS,.enable=P_PIN_MUX_REG(0,8),.disable=NOT_EXIST},
	{.pad=PAD_BOOT_12,.sig=SIG_SPI_NOR_D_A,.enable=P_PIN_MUX_REG(5,1),.disable=P_PIN_MUX_REG(5,7)},
	{.pad=PAD_GPIOD_7,.sig=SIG_TCON_CPH2,.enable=P_PIN_MUX_REG(1,13),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_0,.sig=SIG_FEC_D0_B,.enable=P_PIN_MUX_REG(3,10),.disable=NOT_EXIST},
	{.pad=PAD_GPIOY_3,.sig=SIG_RMII_RX_DATA1,.enable=P_PIN_MUX_REG(6,14),.disable=NOT_EXIST},
	{.pad=PAD_GPIOD_5,.sig=SIG_TCON_3_B,.enable=P_PIN_MUX_REG(0,25),.disable=NOT_EXIST},
	{.pad=PAD_GPIOA_18,.sig=SIG_LCDin_B2,.enable=P_PIN_MUX_REG(0,6),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_22,.sig=SIG_UART_RX_C,.enable=P_PIN_MUX_REG(4,2),.disable=NOT_EXIST},
	{.pad=PAD_GPIOC_3,.sig=SIG_TCON_STV1,.enable=P_PIN_MUX_REG(1,8),.disable=NOT_EXIST},
	{.pad=PAD_GPIOA_4,.sig=SIG_FEC_D4_A,.enable=P_PIN_MUX_REG(3,5),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_24,.sig=SIG_ISO7816_DATA,.enable=P_PIN_MUX_REG(4,14),.disable=NOT_EXIST},
	{.pad=PAD_GPIOC_9,.sig=SIG_TCON_7_A,.enable=P_PIN_MUX_REG(0,19),.disable=NOT_EXIST},
	{.pad=PAD_BOOT_11,.sig=SIG_SDXC_CLK_C,.enable=P_PIN_MUX_REG(4,26),.disable=NOT_EXIST},
	{.pad=PAD_GPIOC_7,.sig=SIG_TCON_CPH1,.enable=P_PIN_MUX_REG(1,4),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_28,.sig=SIG_I2C_SCK,.enable=P_PIN_MUX_REG(5,30),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_20,.sig=SIG_I2S_DATA_audio_out,.enable=P_PIN_MUX_REG(8,24),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_30,.sig=SIG_I2C_SCK,.enable=P_PIN_MUX_REG(8,21),.disable=NOT_EXIST},
	{.pad=PAD_GPIOY_13,.sig=SIG_D0,.enable=P_PIN_MUX_REG(8,7),.disable=NOT_EXIST},
	{.pad=PAD_BOOT_3,.sig=SIG_SD_D3_C,.enable=P_PIN_MUX_REG(6,26),.disable=NOT_EXIST},
	{.pad=PAD_GPIOA_22,.sig=SIG_ENC_10,.enable=P_PIN_MUX_REG(7,10),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_23,.sig=SIG_UART_TX_B,.enable=P_PIN_MUX_REG(4,5),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_20,.sig=SIG_I2S_DATA,.enable=P_PIN_MUX_REG(8,28),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_19,.sig=SIG_FEC_D3_OUT,.enable=P_PIN_MUX_REG(3,12),.disable=NOT_EXIST},
	{.pad=PAD_BOOT_1,.sig=SIG_SDXC_D1_C,.enable=P_PIN_MUX_REG(4,29),.disable=NOT_EXIST},
	{.pad=PAD_GPIOD_1,.sig=SIG_LED_BL_PWM,.enable=P_PIN_MUX_REG(1,28),.disable=NOT_EXIST},
	{.pad=PAD_GPIOC_1,.sig=SIG_PWM_B,.enable=P_PIN_MUX_REG(2,1),.disable=NOT_EXIST},
	{.pad=PAD_GPIOAO_5,.sig=SIG_I2C_SDA,.enable=P_PIN_MUX_REG(9,5),.disable=NOT_EXIST},
	{.pad=PAD_GPIOD_0,.sig=SIG_LCD_VGHL_PWM,.enable=P_PIN_MUX_REG(1,29),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_24,.sig=SIG_UART_RX_B,.enable=P_PIN_MUX_REG(4,4),.disable=NOT_EXIST},
	{.pad=PAD_GPIOD_2,.sig=SIG_TCON_0_B,.enable=P_PIN_MUX_REG(0,22),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_14,.sig=SIG_LCD_G6,.enable=P_PIN_MUX_REG(0,2),.disable=NOT_EXIST},
	{.pad=PAD_BOOT_1,.sig=SIG_SD_D1_C,.enable=P_PIN_MUX_REG(6,28),.disable=NOT_EXIST},
	{.pad=PAD_BOOT_4,.sig=SIG_SDXC_D4_C,.enable=P_PIN_MUX_REG(4,28),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_6,.sig=SIG_I2S_LR_CLK,.enable=P_PIN_MUX_REG(7,26),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_2,.sig=SIG_I2S_OUT_CH45,.enable=P_PIN_MUX_REG(7,20),.disable=NOT_EXIST},
	{.pad=PAD_GPIOA_1,.sig=SIG_FEC_D1_A,.enable=P_PIN_MUX_REG(3,5),.disable=NOT_EXIST},
	{.pad=PAD_GPIOAO_4,.sig=SIG_I2C_SCK_SLAVE,.enable=P_PIN_MUX_REG(9,2),.disable=NOT_EXIST},
	{.pad=PAD_BOOT_11,.sig=SIG_NAND_RB1,.enable=P_PIN_MUX_REG(2,16),.disable=NOT_EXIST},
	{.pad=PAD_GPIOC_7,.sig=SIG_TCON_CPH50,.enable=P_PIN_MUX_REG(1,11),.disable=NOT_EXIST},
	{.pad=PAD_GPIOC_6,.sig=SIG_TCON_4_A,.enable=P_PIN_MUX_REG(0,16),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_25,.sig=SIG_I2C_SDA,.enable=P_PIN_MUX_REG(5,27),.disable=NOT_EXIST},
	{.pad=PAD_BOOT_14,.sig=SIG_NAND_WEn_CLK,.enable=P_PIN_MUX_REG(2,19),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_21,.sig=SIG_ISO7816_DET,.enable=P_PIN_MUX_REG(4,17),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_4,.sig=SIG_I2S_OUT_CH01,.enable=P_PIN_MUX_REG(7,18),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_18,.sig=SIG_I2S_AO_CLK_audio_out,.enable=P_PIN_MUX_REG(8,26),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_0,.sig=SIG_LCD_R0,.enable=P_PIN_MUX_REG(0,1),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_20,.sig=SIG_UART_RTS_B,.enable=P_PIN_MUX_REG(4,6),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_19,.sig=SIG_PCM_OUT,.enable=P_PIN_MUX_REG(4,23),.disable=NOT_EXIST},
	{.pad=PAD_BOOT_7,.sig=SIG_SDXC_D7_C,.enable=P_PIN_MUX_REG(4,28),.disable=NOT_EXIST},
	{.pad=PAD_GPIOD_1,.sig=SIG_PWM_D,.enable=P_PIN_MUX_REG(2,3),.disable=NOT_EXIST},
	{.pad=PAD_GPIOA_12,.sig=SIG_ENC_0,.enable=P_PIN_MUX_REG(7,0),.disable=NOT_EXIST},
	{.pad=PAD_BOOT_3,.sig=SIG_NAND_IO_3,.enable=P_PIN_MUX_REG(2,26),.disable=NOT_EXIST},
	{.pad=PAD_GPIOA_4,.sig=SIG_FEC_CLK_C,.enable=P_PIN_MUX_REG(6,22),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_1,.sig=SIG_I2S_OUT_CH67,.enable=P_PIN_MUX_REG(7,21),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_5,.sig=SIG_LCD_R5,.enable=P_PIN_MUX_REG(0,0),.disable=NOT_EXIST},
	{.pad=PAD_GPIOA_21,.sig=SIG_LCDin_B5,.enable=P_PIN_MUX_REG(0,6),.disable=NOT_EXIST},
	{.pad=PAD_GPIOA_12,.sig=SIG_LCDin_G4,.enable=P_PIN_MUX_REG(0,6),.disable=NOT_EXIST},
	{.pad=PAD_GPIOD_4,.sig=SIG_TCON_OEH_B,.enable=P_PIN_MUX_REG(1,17),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_3,.sig=SIG_I2S_OUT_CH23,.enable=P_PIN_MUX_REG(7,19),.disable=NOT_EXIST},
	{.pad=PAD_BOOT_10,.sig=SIG_SD_CMD_C,.enable=P_PIN_MUX_REG(6,25),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_14,.sig=SIG_FEC_SOP_OUT,.enable=P_PIN_MUX_REG(3,15),.disable=NOT_EXIST},
	{.pad=PAD_GPIOC_3,.sig=SIG_TCON_1_A,.enable=P_PIN_MUX_REG(0,13),.disable=NOT_EXIST},
	{.pad=PAD_GPIOC_4,.sig=SIG_TCON_OEH,.enable=P_PIN_MUX_REG(1,7),.disable=NOT_EXIST},
	{.pad=PAD_GPIOY_11,.sig=SIG_HS,.enable=P_PIN_MUX_REG(8,8),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_18,.sig=SIG_I2S_AO_CLK,.enable=P_PIN_MUX_REG(8,30),.disable=NOT_EXIST},
	{.pad=PAD_GPIOA_4,.sig=SIG_LCDin_R4,.enable=P_PIN_MUX_REG(0,6),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_17,.sig=SIG_I2S_AM_CLK,.enable=P_PIN_MUX_REG(8,31),.disable=NOT_EXIST},
	{.pad=PAD_GPIOA_27,.sig=SIG_ENC_15,.enable=P_PIN_MUX_REG(7,15),.disable=NOT_EXIST},
	{.pad=PAD_GPIOA_17,.sig=SIG_ENC_5,.enable=P_PIN_MUX_REG(7,5),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_11,.sig=SIG_SYS_PLL,.enable=P_PIN_MUX_REG(5,23),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_5,.sig=SIG_I2S_IN_CH01,.enable=P_PIN_MUX_REG(7,25),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_7,.sig=SIG_FEC_D7_B,.enable=P_PIN_MUX_REG(3,11),.disable=NOT_EXIST},
	{.pad=PAD_GPIOY_14,.sig=SIG_D1,.enable=P_PIN_MUX_REG(8,7),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_18,.sig=SIG_SYS_PLL_3,.enable=P_PIN_MUX_REG(5,27),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_17,.sig=SIG_UART_TX_B,.enable=P_PIN_MUX_REG(4,9),.disable=NOT_EXIST},
	{.pad=PAD_BOOT_15,.sig=SIG_NAND_REn_WR,.enable=P_PIN_MUX_REG(2,18),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_25,.sig=SIG_I2C_SDA_slave,.enable=P_PIN_MUX_REG(5,25),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_18,.sig=SIG_UART_RX_B,.enable=P_PIN_MUX_REG(4,8),.disable=NOT_EXIST},
	{.pad=PAD_CARD_4,.sig=SIG_SDXC_CLK_B,.enable=P_PIN_MUX_REG(2,5),.disable=NOT_EXIST},
	{.pad=PAD_GPIOY_20,.sig=SIG_D7,.enable=P_PIN_MUX_REG(8,7),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_21,.sig=SIG_FEC_D5_OUT,.enable=P_PIN_MUX_REG(3,12),.disable=NOT_EXIST},
	{.pad=PAD_CARD_1,.sig=SIG_SDXC_D1_B,.enable=P_PIN_MUX_REG(2,6),.disable=NOT_EXIST},
	{.pad=PAD_GPIOAO_4,.sig=SIG_I2C_SCK,.enable=P_PIN_MUX_REG(9,6),.disable=NOT_EXIST},
	{.pad=PAD_GPIOAO_2,.sig=SIG_UART_CTS,.enable=P_PIN_MUX_REG(9,10),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_21,.sig=SIG_LCD_B5,.enable=P_PIN_MUX_REG(0,4),.disable=NOT_EXIST},
	{.pad=PAD_GPIOD_5,.sig=SIG_TCON_CPV1_B,.enable=P_PIN_MUX_REG(1,16),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_19,.sig=SIG_I2S_LR_CLK_audio_out,.enable=P_PIN_MUX_REG(8,25),.disable=NOT_EXIST},
	{.pad=PAD_GPIOC_0,.sig=SIG_VGA_HS,.enable=P_PIN_MUX_REG(0,21),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_19,.sig=SIG_ISO7816_CLK,.enable=P_PIN_MUX_REG(4,19),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_7,.sig=SIG_PCM_CLK,.enable=P_PIN_MUX_REG(3,27),.disable=NOT_EXIST},
	{.pad=PAD_GPIOA_21,.sig=SIG_ENC_9,.enable=P_PIN_MUX_REG(7,9),.disable=NOT_EXIST},
	{.pad=PAD_GPIOA_19,.sig=SIG_LCDin_B3,.enable=P_PIN_MUX_REG(0,6),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_13,.sig=SIG_MISC_PLL,.enable=P_PIN_MUX_REG(5,21),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_4,.sig=SIG_FEC_D4_B,.enable=P_PIN_MUX_REG(3,11),.disable=NOT_EXIST},
	{.pad=PAD_GPIOD_9,.sig=SIG_TCON_7_B,.enable=P_PIN_MUX_REG(0,29),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_11,.sig=SIG_LCD_G3,.enable=P_PIN_MUX_REG(0,2),.disable=NOT_EXIST},
	{.pad=PAD_GPIOAO_1,.sig=SIG_UART_RX,.enable=P_PIN_MUX_REG(9,11),.disable=NOT_EXIST},
	{.pad=PAD_GPIOB_16,.sig=SIG_VID2_PLL,.enable=P_PIN_MUX_REG(5,18),.disable=NOT_EXIST},
	{.pad=PAD_GPIOD_6,.sig=SIG_TCON_OEV1_B,.enable=P_PIN_MUX_REG(1,15),.disable=NOT_EXIST},
	{.pad=PAD_GPIOX_17,.sig=SIG_PCM_CLK,.enable=P_PIN_MUX_REG(4,25),.disable=NOT_EXIST},
	{.pad=PAD_GPIOY_1,.sig=SIG_RMII_RX_ERR,.enable=P_PIN_MUX_REG(6,16),.disable=NOT_EXIST},
	{.pad=PAD_GPIOD_2,.sig=SIG_TCON_STH1_B,.enable=P_PIN_MUX_REG(1,19),.disable=NOT_EXIST},
};
static const char * pad_name[]={
	[128]="GPIOB_16",
	[93]="GPIOC_6",
	[129]="GPIOB_17",
	[94]="GPIOC_7",
	[130]="GPIOB_18",
	[95]="GPIOC_8",
	[131]="GPIOB_19",
	[96]="GPIOC_9",
	[146]="GPIOA_10",
	[147]="GPIOA_11",
	[148]="GPIOA_12",
	[149]="GPIOA_13",
	[150]="GPIOA_14",
	[151]="GPIOA_15",
	[10]="GPIOY_10",
	[152]="GPIOA_16",
	[11]="GPIOY_11",
	[153]="GPIOA_17",
	[12]="GPIOY_12",
	[154]="GPIOA_18",
	[13]="GPIOY_13",
	[155]="GPIOA_19",
	[14]="GPIOY_14",
	[15]="GPIOY_15",
	[16]="GPIOY_16",
	[17]="GPIOY_17",
	[18]="GPIOY_18",
	[19]="GPIOY_19",
	[77]="GPIOD_0",
	[78]="GPIOD_1",
	[79]="GPIOD_2",
	[80]="GPIOD_3",
	[33]="GPIOX_10",
	[81]="GPIOD_4",
	[34]="GPIOX_11",
	[82]="GPIOD_5",
	[35]="GPIOX_12",
	[83]="GPIOD_6",
	[36]="GPIOX_13",
	[84]="GPIOD_7",
	[37]="GPIOX_14",
	[85]="GPIOD_8",
	[38]="GPIOX_15",
	[86]="GPIOD_9",
	[39]="GPIOX_16",
	[53]="GPIOX_30",
	[40]="GPIOX_17",
	[54]="GPIOX_31",
	[41]="GPIOX_18",
	[55]="GPIOX_32",
	[42]="GPIOX_19",
	[56]="GPIOX_33",
	[57]="GPIOX_34",
	[58]="GPIOX_35",
	[174]="GPIOAO_10",
	[175]="GPIOAO_11",
	[176]="TEST_N",
	[132]="GPIOB_20",
	[133]="GPIOB_21",
	[134]="GPIOB_22",
	[135]="GPIOB_23",
	[136]="GPIOA_0",
	[137]="GPIOA_1",
	[138]="GPIOA_2",
	[139]="GPIOA_3",
	[140]="GPIOA_4",
	[141]="GPIOA_5",
	[142]="GPIOA_6",
	[143]="GPIOA_7",
	[144]="GPIOA_8",
	[156]="GPIOA_20",
	[145]="GPIOA_9",
	[23]="GPIOX_0",
	[157]="GPIOA_21",
	[24]="GPIOX_1",
	[158]="GPIOA_22",
	[25]="GPIOX_2",
	[159]="GPIOA_23",
	[26]="GPIOX_3",
	[160]="GPIOA_24",
	[27]="GPIOX_4",
	[161]="GPIOA_25",
	[28]="GPIOX_5",
	[20]="GPIOY_20",
	[162]="GPIOA_26",
	[29]="GPIOX_6",
	[21]="GPIOY_21",
	[163]="GPIOA_27",
	[30]="GPIOX_7",
	[22]="GPIOY_22",
	[31]="GPIOX_8",
	[32]="GPIOX_9",
	[59]="BOOT_0",
	[60]="BOOT_1",
	[61]="BOOT_2",
	[62]="BOOT_3",
	[63]="BOOT_4",
	[43]="GPIOX_20",
	[112]="GPIOB_0",
	[64]="BOOT_5",
	[44]="GPIOX_21",
	[113]="GPIOB_1",
	[65]="BOOT_6",
	[45]="GPIOX_22",
	[114]="GPIOB_2",
	[66]="BOOT_7",
	[46]="GPIOX_23",
	[115]="GPIOB_3",
	[67]="BOOT_8",
	[47]="GPIOX_24",
	[116]="GPIOB_4",
	[68]="BOOT_9",
	[48]="GPIOX_25",
	[117]="GPIOB_5",
	[49]="GPIOX_26",
	[118]="GPIOB_6",
	[50]="GPIOX_27",
	[119]="GPIOB_7",
	[51]="GPIOX_28",
	[164]="GPIOAO_0",
	[120]="GPIOB_8",
	[52]="GPIOX_29",
	[165]="GPIOAO_1",
	[121]="GPIOB_9",
	[0]="GPIOY_0",
	[166]="GPIOAO_2",
	[1]="GPIOY_1",
	[167]="GPIOAO_3",
	[2]="GPIOY_2",
	[168]="GPIOAO_4",
	[103]="CARD_0",
	[3]="GPIOY_3",
	[169]="GPIOAO_5",
	[104]="CARD_1",
	[4]="GPIOY_4",
	[170]="GPIOAO_6",
	[105]="CARD_2",
	[5]="GPIOY_5",
	[171]="GPIOAO_7",
	[106]="CARD_3",
	[97]="GPIOC_10",
	[6]="GPIOY_6",
	[172]="GPIOAO_8",
	[107]="CARD_4",
	[98]="GPIOC_11",
	[7]="GPIOY_7",
	[173]="GPIOAO_9",
	[108]="CARD_5",
	[99]="GPIOC_12",
	[8]="GPIOY_8",
	[109]="CARD_6",
	[100]="GPIOC_13",
	[9]="GPIOY_9",
	[110]="CARD_7",
	[101]="GPIOC_14",
	[111]="CARD_8",
	[102]="GPIOC_15",
	[69]="BOOT_10",
	[70]="BOOT_11",
	[71]="BOOT_12",
	[72]="BOOT_13",
	[73]="BOOT_14",
	[122]="GPIOB_10",
	[87]="GPIOC_0",
	[74]="BOOT_15",
	[123]="GPIOB_11",
	[88]="GPIOC_1",
	[75]="BOOT_16",
	[124]="GPIOB_12",
	[89]="GPIOC_2",
	[76]="BOOT_17",
	[125]="GPIOB_13",
	[90]="GPIOC_3",
	[126]="GPIOB_14",
	[91]="GPIOC_4",
	[127]="GPIOB_15",
	[92]="GPIOC_5",
	[PAD_MAX_PADS]=NULL
};
static const char * sig_name[]={
	[159]="TCON_4_A",
	[305]="I2C_CLK_SLAVE",
	[136]="TCON_4_B",
	[14]="VS",
	[163]="SPDIF_in",
	[74]="I2C_SDA_slave",
	[44]="PCM_FS",
	[83]="SPI_MISO",
	[32]="I2S_OUT_CH23",
	[253]="FEC_D5_A",
	[127]="LED_BL_PWM",
	[73]="I2C_SDA",
	[31]="SDXC_D2_A",
	[195]="FEC_D5_B",
	[178]="SDXC_D2_B",
	[186]="LCD_R0",
	[92]="SDXC_D2_C",
	[295]="LCDin_CLK",
	[188]="LCD_R1",
	[190]="LCD_R2",
	[52]="SDXC_CMD_A",
	[192]="LCD_R3",
	[184]="SDXC_CMD_B",
	[150]="VGA_VS",
	[37]="PCM_OUT",
	[194]="LCD_R4",
	[108]="SDXC_CMD_C",
	[49]="SD_CLK_A",
	[306]="UART_RTS",
	[270]="ENC_0",
	[196]="LCD_R5",
	[181]="SD_CLK_B",
	[151]="TCON_0_A",
	[110]="NAND_RB0",
	[272]="ENC_1",
	[198]="LCD_R6",
	[128]="TCON_0_B",
	[114]="NAND_RB1",
	[111]="SD_CLK_C",
	[56]="UART_RX_A",
	[29]="I2S_OUT_CH45",
	[274]="ENC_2",
	[266]="FEC_D_VALID_A",
	[200]="LCD_R7",
	[61]="UART_RX_B",
	[6]="RMII_TX_EN",
	[276]="ENC_3",
	[225]="FEC_D1_OUT",
	[205]="FEC_D_VALID_B",
	[170]="HDMI_SDA_5V",
	[70]="UART_RX_C",
	[278]="ENC_4",
	[257]="FEC_D_VALID_C",
	[280]="ENC_5",
	[154]="TCON_STV1",
	[144]="TCON_VCOM_B",
	[282]="ENC_6",
	[121]="NAND_REn_WR",
	[47]="SDXC_D7_A",
	[284]="ENC_7",
	[228]="FEC_D2_OUT",
	[286]="ENC_8",
	[243]="FEC_D1_A",
	[103]="SDXC_D7_C",
	[311]="JTAG_TCK",
	[288]="ENC_9",
	[187]="FEC_D1_B",
	[297]="LCDin_HS",
	[242]="LCDin_R0",
	[26]="I2S_OUT_CH67",
	[244]="LCDin_R1",
	[246]="LCDin_R2",
	[249]="LCDin_R3",
	[161]="TCON_5_A",
	[122]="NAND_DQS",
	[252]="LCDin_R4",
	[138]="TCON_5_B",
	[255]="LCDin_R5",
	[24]="SD_D0_A",
	[258]="LCDin_R6",
	[219]="FEC_CLK_OUT",
	[173]="SD_D0_B",
	[309]="WD_GPIO",
	[261]="LCDin_R7",
	[118]="NAND_CLE",
	[84]="SD_D0_C",
	[15]="D0",
	[81]="SPI_SCLK",
	[16]="D1",
	[17]="D2",
	[202]="LCD_G0",
	[18]="D3",
	[256]="FEC_D6_A",
	[204]="LCD_G1",
	[123]="SPI_NOR_CS_n_A",
	[34]="SDXC_D3_A",
	[10]="RMII_MDIO",
	[19]="D4",
	[206]="LCD_G2",
	[197]="FEC_D6_B",
	[180]="SDXC_D3_B",
	[158]="TCON_CPV1",
	[156]="TCON_OEH",
	[125]="LCD_VGHL_PWM",
	[54]="I2S_AO_CLK_audio_out",
	[20]="D5",
	[208]="LCD_G3",
	[95]="SDXC_D3_C",
	[21]="D6",
	[211]="LCD_G4",
	[22]="D7",
	[214]="LCD_G5",
	[217]="LCD_G6",
	[82]="SPI_MOSI",
	[231]="FEC_D3_OUT",
	[220]="LCD_G7",
	[5]="RMII_RX_DATA0",
	[153]="TCON_1_A",
	[4]="RMII_RX_DATA1",
	[130]="TCON_1_B",
	[46]="I2S_AM_CLK_audio_out",
	[264]="FEC_SOP_A",
	[203]="FEC_SOP_B",
	[254]="FEC_SOP_C",
	[160]="TCON_OEV1",
	[263]="LCDin_G0",
	[105]="NAND_CE0",
	[8]="RMII_TX_DATA0",
	[265]="LCDin_G1",
	[245]="FEC_D2_A",
	[106]="NAND_CE1",
	[60]="ISO7816_DET",
	[7]="RMII_TX_DATA1",
	[267]="LCDin_G2",
	[189]="FEC_D2_B",
	[109]="NAND_CE2",
	[269]="LCDin_G3",
	[113]="NAND_CE3",
	[271]="LCDin_G4",
	[212]="DDR_PLL",
	[273]="LCDin_G5",
	[275]="LCDin_G6",
	[164]="TCON_6_A",
	[139]="TCON_CPH50_B",
	[45]="I2S_AM_CLK",
	[277]="LCDin_G7",
	[143]="TCON_6_B",
	[27]="SD_D1_A",
	[23]="CLK",
	[175]="SD_D1_B",
	[51]="SD_CMD_A",
	[183]="SD_CMD_B",
	[87]="SD_D1_C",
	[107]="SD_CMD_C",
	[233]="FEC_D4_OUT",
	[42]="I2S_LR_CLK_audio_out",
	[62]="ISO7816_RESET",
	[259]="FEC_D7_A",
	[36]="SDXC_D4_A",
	[199]="FEC_D7_B",
	[97]="SDXC_D4_C",
	[312]="JTAG_TMS",
	[308]="I2C_SCK_SLAVE",
	[218]="AUD_PLL",
	[310]="REMOTE",
	[290]="ENC_10",
	[155]="TCON_2_A",
	[292]="ENC_11",
	[132]="TCON_2_B",
	[294]="ENC_12",
	[40]="PCM_IN",
	[9]="RMII_MDC",
	[299]="LCDin_VS",
	[296]="ENC_13",
	[298]="ENC_14",
	[162]="TCON_CPH50",
	[11]="FIR",
	[300]="ENC_15",
	[216]="FEC_SOP_OUT",
	[169]="HDMI_HPD_5V",
	[171]="HDMI_SCL_5V",
	[145]="ENC_16",
	[12]="IDQ",
	[167]="ENC_17",
	[129]="TCON_STH1_B",
	[75]="I2C_SCK",
	[247]="FEC_D3_A",
	[90]="I2C_SCL",
	[25]="SDXC_D0_A",
	[191]="FEC_D3_B",
	[174]="SDXC_D0_B",
	[165]="TCON_VCOM",
	[53]="I2S_AO_CLK",
	[2]="RMII_RX_ERR",
	[223]="LCD_B0",
	[210]="FEC_FAIL_OUT",
	[146]="PWM_A",
	[85]="SDXC_D0_C",
	[48]="PCM_CLK",
	[13]="HS",
	[235]="FEC_D5_OUT",
	[226]="LCD_B1",
	[166]="SPDIF_out",
	[149]="PWM_B",
	[229]="LCD_B2",
	[124]="PWM_C",
	[65]="I2S_DATA",
	[232]="LCD_B3",
	[168]="TCON_7_A",
	[126]="PWM_D",
	[234]="LCD_B4",
	[172]="HDMI_CEC",
	[147]="TCON_7_B",
	[237]="FEC_D6_OUT",
	[236]="LCD_B5",
	[215]="MISC_PLL",
	[79]="SPI_SS0",
	[30]="SD_D2_A",
	[262]="FEC_CLK_A",
	[238]="LCD_B6",
	[177]="SD_D2_B",
	[80]="SPI_SS1",
	[240]="LCD_B7",
	[201]="FEC_CLK_B",
	[91]="SD_D2_C",
	[77]="SPI_SS2",
	[313]="JTAG_TDI",
	[251]="FEC_CLK_C",
	[119]="SPI_NOR_C_A",
	[148]="VGA_HS",
	[78]="SPI_RDYn",
	[76]="I2C_SCK_slave",
	[41]="I2S_LR_CLK",
	[39]="SDXC_D5_A",
	[99]="SDXC_D5_C",
	[50]="SDXC_CLK_A",
	[314]="JTAG_TDO",
	[182]="SDXC_CLK_B",
	[279]="LCDin_B0",
	[112]="SDXC_CLK_C",
	[281]="LCDin_B1",
	[283]="LCDin_B2",
	[152]="TCON_STH1",
	[285]="LCDin_B3",
	[227]="SYS_PLL_2",
	[157]="TCON_3_A",
	[133]="TCON_OEH_B",
	[287]="LCDin_B4",
	[230]="SYS_PLL_3",
	[134]="TCON_3_B",
	[289]="LCDin_B5",
	[117]="SPI_NOR_Q_A",
	[55]="UART_TX_A",
	[291]="LCDin_B6",
	[64]="ISO7816_CLK",
	[59]="UART_TX_B",
	[304]="UART_CTS",
	[293]="LCDin_B7",
	[116]="NAND_ALE",
	[69]="UART_TX_C",
	[58]="UART_RTS_A",
	[67]="UART_RTS_B",
	[135]="TCON_CPV1_B",
	[72]="UART_RTS_C",
	[239]="FEC_D7_OUT",
	[268]="FEC_FAIL_A",
	[250]="FEC_D4_A",
	[28]="SDXC_D1_A",
	[207]="FEC_FAIL_B",
	[193]="FEC_D4_B",
	[176]="SDXC_D1_B",
	[303]="UART_RX",
	[260]="FEC_FAIL_C",
	[213]="FEC_D_VALID_OUT",
	[88]="SDXC_D1_C",
	[38]="I2S_IN_CH01",
	[221]="VID_PLL",
	[137]="TCON_OEV1_B",
	[209]="SYS_PLL",
	[86]="NAND_IO_0",
	[33]="SD_D3_A",
	[179]="SD_D3_B",
	[140]="TCON_CPH1",
	[89]="NAND_IO_1",
	[302]="UART_TX",
	[141]="TCON_CPH2",
	[94]="SD_D3_C",
	[93]="NAND_IO_2",
	[224]="VID2_PLL",
	[142]="TCON_CPH3",
	[96]="NAND_IO_3",
	[131]="TCON_STV1_B",
	[115]="SPI_NOR_D_A",
	[98]="NAND_IO_4",
	[100]="NAND_IO_5",
	[102]="NAND_IO_6",
	[66]="I2S_DATA_audio_out",
	[43]="SDXC_D6_A",
	[104]="NAND_IO_7",
	[57]="UART_CTS_A",
	[241]="FEC_D0_A",
	[101]="SDXC_D6_C",
	[63]="UART_CTS_B",
	[1]="CLK_OUT",
	[307]="I2C_SDA_SLAVE",
	[185]="FEC_D0_B",
	[71]="UART_CTS_C",
	[301]="LCDin_DE",
	[248]="FEC_D0_C",
	[222]="FEC_D0_OUT",
	[120]="NAND_WEn_CLK",
	[35]="I2S_OUT_CH01",
	[68]="ISO7816_DATA",
	[3]="RMII_CRS_DV",
	[0]="RMII_CLK50_IN",
	[SIG_GPIOIN]="GPIOIN",
	[SIG_GPIOOUT]="GPIOOUT",
	[SIG_MAX_SIGS]=NULL
};
/* GPIO operation part */
static unsigned pad_gpio_bit[]={
	[PAD_GPIOAO_5]=P_GPIO_IN(6,5),
	[PAD_GPIOX_32]=P_GPIO_IN(3,20),
	[PAD_GPIOX_29]=P_GPIO_IN(4,29),
	[PAD_CARD_0]=P_GPIO_IN(5,23),
	[PAD_GPIOY_6]=P_GPIO_IN(5,6),
	[PAD_GPIOA_9]=P_GPIO_IN(0,9),
	[PAD_GPIOC_10]=P_GPIO_IN(2,10),
	[PAD_GPIOD_0]=P_GPIO_IN(2,16),
	[PAD_GPIOY_1]=P_GPIO_IN(5,1),
	[PAD_GPIOA_4]=P_GPIO_IN(0,4),
	[PAD_GPIOB_15]=P_GPIO_IN(1,15),
	[PAD_GPIOD_9]=P_GPIO_IN(2,25),
	[PAD_GPIOY_17]=P_GPIO_IN(5,17),
	[PAD_GPIOB_10]=P_GPIO_IN(1,10),
	[PAD_CARD_4]=P_GPIO_IN(5,27),
	[PAD_BOOT_6]=P_GPIO_IN(3,6),
	[PAD_GPIOX_1]=P_GPIO_IN(4,1),
	[PAD_GPIOD_4]=P_GPIO_IN(2,20),
	[PAD_GPIOY_12]=P_GPIO_IN(5,12),
	[PAD_GPIOC_9]=P_GPIO_IN(2,9),
	[PAD_GPIOA_15]=P_GPIO_IN(0,15),
	[PAD_BOOT_1]=P_GPIO_IN(3,1),
	[PAD_GPIOB_22]=P_GPIO_IN(1,22),
	[PAD_GPIOB_19]=P_GPIO_IN(1,19),
	[PAD_GPIOC_4]=P_GPIO_IN(2,4),
	[PAD_GPIOA_10]=P_GPIO_IN(0,10),
	[PAD_GPIOA_27]=P_GPIO_IN(0,27),
	[PAD_GPIOX_12]=P_GPIO_IN(4,12),
	[PAD_GPIOX_5]=P_GPIO_IN(4,5),
	[PAD_GPIOAO_11]=P_GPIO_IN(6,11),
	[PAD_GPIOB_4]=P_GPIO_IN(1,4),
	[PAD_BOOT_15]=P_GPIO_IN(3,15),
	[PAD_GPIOA_22]=P_GPIO_IN(0,22),
	[PAD_GPIOA_19]=P_GPIO_IN(0,19),
	[PAD_GPIOAO_0]=P_GPIO_IN(6,0),
	[PAD_GPIOX_24]=P_GPIO_IN(4,24),
	[PAD_BOOT_10]=P_GPIO_IN(3,10),
	[PAD_GPIOX_16]=P_GPIO_IN(4,16),
	[PAD_GPIOAO_9]=P_GPIO_IN(6,9),
	[PAD_GPIOB_8]=P_GPIO_IN(1,8),
	[PAD_GPIOC_14]=P_GPIO_IN(2,14),
	[PAD_GPIOAO_4]=P_GPIO_IN(6,4),
	[PAD_GPIOX_31]=P_GPIO_IN(4,31),
	[PAD_GPIOX_28]=P_GPIO_IN(4,28),
	[PAD_GPIOY_5]=P_GPIO_IN(5,5),
	[PAD_GPIOA_8]=P_GPIO_IN(0,8),
	[PAD_GPIOY_0]=P_GPIO_IN(5,0),
	[PAD_GPIOA_3]=P_GPIO_IN(0,3),
	[PAD_GPIOB_14]=P_GPIO_IN(1,14),
	[PAD_CARD_8]=P_GPIO_IN(5,31),
	[PAD_GPIOD_8]=P_GPIO_IN(2,24),
	[PAD_GPIOY_16]=P_GPIO_IN(5,16),
	[PAD_CARD_3]=P_GPIO_IN(5,26),
	[PAD_BOOT_5]=P_GPIO_IN(3,5),
	[PAD_GPIOY_9]=P_GPIO_IN(5,9),
	[PAD_GPIOX_0]=P_GPIO_IN(4,0),
	[PAD_GPIOD_3]=P_GPIO_IN(2,19),
	[PAD_GPIOY_11]=P_GPIO_IN(5,11),
	[PAD_GPIOC_8]=P_GPIO_IN(2,8),
	[PAD_GPIOA_14]=P_GPIO_IN(0,14),
	[PAD_GPIOB_21]=P_GPIO_IN(1,21),
	[PAD_GPIOB_18]=P_GPIO_IN(1,18),
	[PAD_GPIOX_9]=P_GPIO_IN(4,9),
	[PAD_GPIOC_3]=P_GPIO_IN(2,3),
	[PAD_GPIOA_26]=P_GPIO_IN(0,26),
	[PAD_GPIOX_11]=P_GPIO_IN(4,11),
	[PAD_GPIOAO_10]=P_GPIO_IN(6,10),
	[PAD_GPIOB_3]=P_GPIO_IN(1,3),
	[PAD_BOOT_14]=P_GPIO_IN(3,14),
	[PAD_GPIOA_21]=P_GPIO_IN(0,21),
	[PAD_GPIOA_18]=P_GPIO_IN(0,18),
	[PAD_GPIOX_23]=P_GPIO_IN(4,23),
	[PAD_GPIOAO_8]=P_GPIO_IN(6,8),
	[PAD_GPIOX_35]=P_GPIO_IN(3,23),
	[PAD_GPIOB_7]=P_GPIO_IN(1,7),
	[PAD_GPIOC_13]=P_GPIO_IN(2,13),
	[PAD_GPIOAO_3]=P_GPIO_IN(6,3),
	[PAD_GPIOX_30]=P_GPIO_IN(4,30),
	[PAD_BOOT_0]=P_GPIO_IN(3,0),
	[PAD_GPIOY_4]=P_GPIO_IN(5,4),
	[PAD_GPIOA_7]=P_GPIO_IN(0,7),
	[PAD_GPIOA_2]=P_GPIO_IN(0,2),
	[PAD_GPIOB_13]=P_GPIO_IN(1,13),
	[PAD_CARD_7]=P_GPIO_IN(5,30),
	[PAD_BOOT_9]=P_GPIO_IN(3,9),
	[PAD_GPIOX_4]=P_GPIO_IN(4,4),
	[PAD_GPIOD_7]=P_GPIO_IN(2,23),
	[PAD_GPIOY_15]=P_GPIO_IN(5,15),
	[PAD_CARD_2]=P_GPIO_IN(5,25),
	[PAD_BOOT_4]=P_GPIO_IN(3,4),
	[PAD_GPIOD_2]=P_GPIO_IN(2,18),
	[PAD_GPIOY_10]=P_GPIO_IN(5,10),
	[PAD_GPIOC_7]=P_GPIO_IN(2,7),
	[PAD_GPIOA_13]=P_GPIO_IN(0,13),
	[PAD_GPIOB_20]=P_GPIO_IN(1,20),
	[PAD_GPIOX_15]=P_GPIO_IN(4,15),
	[PAD_GPIOX_8]=P_GPIO_IN(4,8),
	[PAD_GPIOC_2]=P_GPIO_IN(2,2),
	[PAD_GPIOY_19]=P_GPIO_IN(5,19),
	[PAD_GPIOY_22]=P_GPIO_IN(5,22),
	[PAD_GPIOA_25]=P_GPIO_IN(0,25),
	[PAD_GPIOX_10]=P_GPIO_IN(4,10),
	[PAD_GPIOX_27]=P_GPIO_IN(4,27),
	[PAD_GPIOB_2]=P_GPIO_IN(1,2),
	[PAD_BOOT_13]=P_GPIO_IN(3,13),
	[PAD_GPIOA_20]=P_GPIO_IN(0,20),
	[PAD_GPIOA_17]=P_GPIO_IN(0,17),
	[PAD_GPIOX_22]=P_GPIO_IN(4,22),
	[PAD_GPIOX_19]=P_GPIO_IN(4,19),
	[PAD_GPIOAO_7]=P_GPIO_IN(6,7),
	[PAD_GPIOX_34]=P_GPIO_IN(3,22),
	[PAD_GPIOB_6]=P_GPIO_IN(1,6),
	[PAD_GPIOY_8]=P_GPIO_IN(5,8),
	[PAD_GPIOC_12]=P_GPIO_IN(2,12),
	[PAD_GPIOAO_2]=P_GPIO_IN(6,2),
	[PAD_GPIOY_3]=P_GPIO_IN(5,3),
	[PAD_GPIOA_6]=P_GPIO_IN(0,6),
	[PAD_GPIOB_17]=P_GPIO_IN(1,17),
	[PAD_GPIOA_1]=P_GPIO_IN(0,1),
	[PAD_GPIOB_12]=P_GPIO_IN(1,12),
	[PAD_CARD_6]=P_GPIO_IN(5,29),
	[PAD_BOOT_8]=P_GPIO_IN(3,8),
	[PAD_GPIOX_3]=P_GPIO_IN(4,3),
	[PAD_GPIOD_6]=P_GPIO_IN(2,22),
	[PAD_GPIOY_14]=P_GPIO_IN(5,14),
	[PAD_CARD_1]=P_GPIO_IN(5,24),
	[PAD_BOOT_3]=P_GPIO_IN(3,3),
	[PAD_GPIOC_6]=P_GPIO_IN(2,6),
	[PAD_GPIOA_12]=P_GPIO_IN(0,12),
	[PAD_GPIOX_14]=P_GPIO_IN(4,14),
	[PAD_GPIOX_7]=P_GPIO_IN(4,7),
	[PAD_GPIOC_1]=P_GPIO_IN(2,1),
	[PAD_GPIOY_21]=P_GPIO_IN(5,21),
	[PAD_GPIOY_18]=P_GPIO_IN(5,18),
	[PAD_BOOT_17]=P_GPIO_IN(3,17),
	[PAD_GPIOA_24]=P_GPIO_IN(0,24),
	[PAD_GPIOX_26]=P_GPIO_IN(4,26),
	[PAD_GPIOB_1]=P_GPIO_IN(1,1),
	[PAD_BOOT_12]=P_GPIO_IN(3,12),
	[PAD_GPIOA_16]=P_GPIO_IN(0,16),
	[PAD_GPIOX_21]=P_GPIO_IN(4,21),
	[PAD_GPIOX_18]=P_GPIO_IN(4,18),
	[PAD_GPIOAO_6]=P_GPIO_IN(6,6),
	[PAD_GPIOX_33]=P_GPIO_IN(3,21),
	[PAD_GPIOB_5]=P_GPIO_IN(1,5),
	[PAD_GPIOY_7]=P_GPIO_IN(5,7),
	[PAD_GPIOC_11]=P_GPIO_IN(2,11),
	[PAD_GPIOD_1]=P_GPIO_IN(2,17),
	[PAD_GPIOY_2]=P_GPIO_IN(5,2),
	[PAD_GPIOA_5]=P_GPIO_IN(0,5),
	[PAD_GPIOB_16]=P_GPIO_IN(1,16),
	[PAD_GPIOB_11]=P_GPIO_IN(1,11),
	[PAD_CARD_5]=P_GPIO_IN(5,28),
	[PAD_BOOT_7]=P_GPIO_IN(3,7),
	[PAD_GPIOX_2]=P_GPIO_IN(4,2),
	[PAD_GPIOD_5]=P_GPIO_IN(2,21),
	[PAD_GPIOY_13]=P_GPIO_IN(5,13),
	[PAD_BOOT_2]=P_GPIO_IN(3,2),
	[PAD_GPIOB_23]=P_GPIO_IN(1,23),
	[PAD_GPIOC_5]=P_GPIO_IN(2,5),
	[PAD_GPIOA_11]=P_GPIO_IN(0,11),
	[PAD_GPIOX_13]=P_GPIO_IN(4,13),
	[PAD_GPIOX_6]=P_GPIO_IN(4,6),
	[PAD_GPIOC_0]=P_GPIO_IN(2,0),
	[PAD_GPIOY_20]=P_GPIO_IN(5,20),
	[PAD_BOOT_16]=P_GPIO_IN(3,16),
	[PAD_GPIOA_23]=P_GPIO_IN(0,23),
	[PAD_GPIOAO_1]=P_GPIO_IN(6,1),
	[PAD_GPIOX_25]=P_GPIO_IN(4,25),
	[PAD_GPIOB_0]=P_GPIO_IN(1,0),
	[PAD_BOOT_11]=P_GPIO_IN(3,11),
	[PAD_GPIOX_20]=P_GPIO_IN(4,20),
	[PAD_GPIOX_17]=P_GPIO_IN(4,17),
	[PAD_GPIOA_0]=P_GPIO_IN(0,0),
	[PAD_GPIOB_9]=P_GPIO_IN(1,9),
	[PAD_GPIOC_15]=P_GPIO_IN(2,15)
};
